hardware

DE10-Nano

The Terasic development board, built around an Intel Cyclone V SoC FPGA, that the MiSTer project runs on.+ Defined in the FPGA and the MiSTer Project entry of the archive.

ask the oracle › read FPGA and the MiSTer Project ›

alongside it

Analogue Core HDL Latency Look-Up Table Reconfigurable Logic Verilog